diff --git a/subdisassem/capstone_wrapper.py b/subdisassem/capstone_wrapper.py
index 7749cd4..5bc2c2e 100644
--- a/subdisassem/capstone_wrapper.py
+++ b/subdisassem/capstone_wrapper.py
@@ -42,7 +42,7 @@ class _CapstoneBase:
         if disassembly:
             self.disassembly = disassembly
         else:
-            logging.debug("disassembly_empty")
+            logging.warning("disassembly_empty")
             self.disassembly = list()
 
     def __repr__(self) -> str:
diff --git a/subdisassem/rizin_wrapper.py b/subdisassem/rizin_wrapper.py
index d660d64..7e1427d 100644
--- a/subdisassem/rizin_wrapper.py
+++ b/subdisassem/rizin_wrapper.py
@@ -5,16 +5,35 @@ import json
 
 
 class _RizinBase:
-    def __init__(self, path: Path):
+    def __init__(self, path: Path, offset: int = 0):
         rz_pipe = rzpipe.open(str(path.absolute()))
 
         for cmd in self.arch_cmds:
             rz_pipe.cmd(cmd)
 
-        rz_pipe.cmd("aa")
-        result = rz_pipe.cmd("pdj")
+        disassembly = list()
+
+        while offset < path.stat().st_size:
+            result = rz_pipe.cmd(f"s {offset}")
+            result = rz_pipe.cmd("pdj")
+            result = json.loads(result)
+
+            for each in result:
+                new_offset = int(each.get("offset"))
+
+            if offset >= new_offset:
+                break
+
+            offset = new_offset
+            disassembly += result
+
         rz_pipe.quit()
-        self.disassembly = json.loads(result)
+
+        if disassembly:
+            self.disassembly = disassembly
+        else:
+            logging.warning("disassembly_empty")
+            self.disassembly = list()
 
     def __repr__(self) -> str:
         return self.objdump
@@ -38,7 +57,8 @@ class _RizinBase:
         for each in self.disassembly:
             offset = each.get("offset")
             opcode = each.get("opcode")
-            if opcode:
+
+            if not opcode in ["invalid", "nop", None]:
                 _objdump += f"{offset:#02x}:\t{opcode}\n"
 
         self._objdump = _objdump
@@ -55,7 +75,7 @@ class _RizinBase:
             offset = each.get("offset")
             opcode = each.get("opcode")
 
-            if opcode:
+            if not opcode in ["invalid", "nop", None]:
                 mnemonic = opcode.split(" ")[0]
                 opcode = opcode.split(" ")[1:]
                 _disasm.append([offset, mnemonic, opcode])
@@ -263,7 +283,7 @@ class hppa(_RizinBase):
 
 
 class i4004(_RizinBase):
-    arch_cmds = ["e asm.arch=i4004", "e asm.bits=4"]
+    arch_cmds = ["e asm.arch=i4004"]
 
 
 class i8080(_RizinBase):
diff --git a/subdisassem/scripts.py b/subdisassem/scripts.py
index 3eea0b2..9770926 100644
--- a/subdisassem/scripts.py
+++ b/subdisassem/scripts.py
@@ -233,7 +233,7 @@ def subdisassem_script():
                 )
                 continue
 
-            disasembler = arch(path=args.bin_path)
+            disasembler = arch(path=args.bin_path, offset=offset)
             row = Disassembly()
             row.arch = disasembler.__class__.__name__
             row.checksum = checksum